Intel Xe discrete graphics

Intel XE GPU

On the Architecture Day event, the tech giant Intel has declared about the release of the Xe GPU. Intel also focused on the detailed architectural design of this GPU. At the HotChips Semiconductor Chip Conference, Intel also has made a detailed public explanation regarding the launching of Intel Xe GPU. In this regard, Raja Koduri, the senior vice president of the discrete graphics division of Intel has also publicly displayed the high-performance version of the Xe GPU in a four-chip package.

Intel Xe discrete graphics

He also displayed the back packaging design. He mentioned, now the densely packed capacitors and other components are visible, and these components will be divided into approximately 16 areas; four nanotechnologies for every area. The Intel Xe high-performance GPU offers three specifications that include 1 Tile, 2 Tile, and 4 Tile. In this GPU, the one, two, and four chips are included inside, and the appearance of these chips is square, rectangular, and square respectively.

Apart from the inner part, Raja Koduri also showed the front design and back design of the 2 Tile. However, it is still not clear how the internal multi chips of this GPU are connected and packaged. As per guess, we can say EMIB or Co-EMIB will be used and the latest HBM2e, which is a high-bandwidth video memory will be attached in this Intel Xe GPU. According to a report provided by Intel, Xe GPU with Tile 1, Tile 2, and 4 Tile will provide the best performance ever.

Intel Xe discrete graphics

Four Versions Of The Intel Xe GPU

According to the same architecture, the Intel Xe GPU is divided into four versions. Though these four divisions are optimized for different applications. The four divisions are;


It is a newly added version that is dedicated to outsourcing manufacturing, game optimization, GDDR6 video memory, and support ray tracing. However, this specific product has not been announced yet.


This version is dedicated for machine learning optimization and high-performance computation. It includes 1 and 2 Tile packages, Co-EMIB packages, and HBM2e video memory. This version is under design now.


This version is dedicated for low power consumption optimization. It is manufactured with Intel 10nm single block design. The Xe LP can be integrated into the processor. For mobile content creation, the streaming oriented SG1 also has been put in the production process.


This version is dedicated for media optimization and machine learning. It supports 1, 2, and 4 Tile and HBM2e video memory as well. It is not yet announced.